1. Field of the Invention
The present invention relates generally to a piezoelectric identification device and applications thereof. More particularly, it relates to a piezoelectric device for obtaining biometric information, such as a fingerprint, and using the obtained information to recognize and/or identify an individual.
2. Background Art
Biometrics are a group of technologies that provide a high level of security. Fingerprint capture and recognition is an important biometric technology. Law enforcement, banking, voting, and other industries increasingly rely upon fingerprints as a biometric to recognize or verify identity. See, Biometrics Explained, v. 2.0, G. Roethenbaugh, International Computer Society Assn. Carlisle, Pa. 1998, pages 1-34 (incorporated herein by reference in its entirety).
Optical fingerprint scanners are available which detect a reflected optical image of a fingerprint. To capture a quality image at a sufficiently high resolution, optical fingerprint scanners require at minimum optical components (e.g., lenses), an illumination source, and an imaging camera. Such components add to the overall cost of a fingerprint scanner. Mechanical structures to maintain alignment also increase manufacturing and maintenance costs.
Solid-state silicon-based transducers are also available in fingerprint scanners sold commercially. Such silicon transducers measure capacitance. This requires the brittle silicon transducers to be within a few microns of the fingerprint sensing circuit reducing their durability. To detect a rolled fingerprint, the sensing array of the solid-state transducer needs to have an area of 1 inchxc3x971 inch and a thickness of about 50 microns. This is a big geometry for silicon that increases the base cost of a fingerprint scanner and leads to greater maintenance costs. Durability and structural integrity are also more likely to suffer in such a large silicon geometry.
What is needed is an inexpensive, durable fingerprint scanner with low maintenance costs. What is also needed is a low cost biometric device that can protect individuals and the general populace against physical danger, fraud, and theft (especially in the realm of electronic commerce).
A multiplexer for a biometric apparatus having a signal generator, a sensor, and a processor is presented. In an embodiment, the sensor is a piezoelectric sensor having at least fifty thousand piezo ceramic elements arranged in a two-dimensional array of X rows with Y piezo ceramic elements in each of the X rows. The piezo ceramic elements are typically spaced on a pitch equal to or less than approximately two hundred microns.
In an embodiment, the multiplexer includes a plurality of first conductors and a plurality of second conductors. The first conductors are coupled to a first end of the piezo ceramic elements. The second conductors are coupled to a second end of the piezo ceramic elements. The first conductors are used to route an output signal from the signal generator to the piezo ceramic elements. The second conductors are used to route a signal from the piezo ceramic elements to an input port of the processor. Each of the first conductors is approximately orthogonal to each of the plurality of second conductors.
In an embodiment, a plurality of first switches is coupled to the plurality of first conductors, and a plurality of second switches is coupled to the plurality of second conductors. At least one shift register is coupled to the plurality of first switches and at least one shift register coupled to the plurality of second switches. These shift registers control the first switches and the second switches. A controller coupled to the shift registers controls the operation of the shift registers, thereby controlling the positions of the first switches and the second switches.
In an embodiment, each of the first switches and second switches is a three-way switch. Each of the first three-way switches is used to couple one of the first conductors to an input port of the signal generator, a high impedance node, or a low impedance node. Each of the second three-way switches is used to couple one of the second conductors to an input port of the processor, a high impedance node, or a low impedance node.
Further features and advantages of the present invention, as well as the structure and operation of various embodiments of the present invention, are described in detail below with reference to the accompanying drawings.